Chemical mechanical planarization or polishing (CMP) is the primary process to achieve local and global planarity of integrated circuit (IC) devices. The technique typically applies CMP compositions or slurries containing abrasives and other additives as an active chemistry between a rotating substrate surface and a polishing pad under an applied load. Thus, the CMP process couples a physical process such as abrasion with a chemical process such as oxidation or chelation. It is not desirable for the removal or polishing of substrate materials to be comprised of purely physical or purely chemical action, but rather the synergistic combination of both in order to achieve a fast uniform removal.
This way, the substrate material is removed until the desired planarity is achieved or a barrier sublayer or stopping layer is exposed. Ultimately, a planar, defect-free surface is obtained which enables proper multilayer IC device fabrication by subsequent photolithography, patterning, etching and thin-film processing.
The progressive decrease in feature size of the circuit components in integrated circuit (IC) devices having large-scale integration (LSI) or very large-scale integration (VLSI) has tremendously increased the need for global surface planarization of the various thin film layers that constitute the ICs by CMP. Typically, CMP involves the removal of thin films of materials such as                copper which is used for the electrically conductive wiring,        tantalum nitride, tantalum/tantalum nitride or titanium which are used as diffusion barrier to prevent the diffusion of copper into the dielectric material, and        silicon dioxide is used as the insulating dielectric material between the conductive wirings.        
It is therefore necessary to be able to polish different layers at a desired rate to obtain the desired defect free surface as described for example in the American patent applications US 2005/0076578 A1 (U.S. Pat. No. 7,153,335 B2) and US 2009/0311864 A1. Therefore, a typical CMP slurry used for barrier CMP entails different components to enhance and suppress the removal rates (MRR) to achieve the desired selectivity requirements.
Thus, tantalum nitride MRR can be modulated by an oxidizing agent such as hydrogen peroxide and a tantalum nitride enhancer such as malonic acid which is a film forming agent interrupting the tantalum oxide formation.
The MRR of silicon dioxide, in particular TEOS, can be suppressed by polyols which are selectively absorbed on the hydroxyl group rich surfaces.
The MRR of copper can be modulated by the combined use of an enhancer such as L-histidine and a passivating agent such as benzenetriazole (BTA).
CMP slurries for silicon-based inter-metal dielectric layers have been particularly well developed in the semiconductor industry, and the chemical and mechanical nature of polishing and wear of the silicon-based dielectrics is reasonably well understood. However, one problem with a silicon-based dielectric materials is that their dielectric constant is relatively high, being approximately 3.9 or higher, depending on factors such residual moisture content. As a result, the capacitance between the conductive layers is also relatively high, which in turn limits the speed or frequency at which the IC can operate. The strategies which have been developed to reduce the capacitance include (1) incorporating metals with lower resistivity values (e.g., copper), and (2) providing electrical isolation with insulating materials having lower dielectric constants than silicon dioxide, i.e., low-k and ultra-low-k dielectric materials.
Such low-k and ultra-low-k dielectric materials include organic polymeric materials, inorganic and organic porous dielectric materials, and blended or composite organic and inorganic materials, which can be porous or non-porous, as for example, carbon-doped silicon dioxide materials. It would be highly desirable to incorporate such low-k and ultra-low-k dielectric materials into the IC structures whilst still being able to utilize the conventional CMP slurries for polishing the surface of the dielectric materials during the semiconductor wafer processing. In particular, it would be highly desirable to achieve a high selectivity of silicon dioxide, in particular TEOS, over low-k and ultra-low-k materials such as carbon-doped silicon dioxide materials. Such a high selectivity is very important to maintain ultra-low-k integrity, in particular for the 45 nm node and below and for new complementary metal-oxide semiconductor (CMOS) generations.
The US patent application US 2003/0228762 A1 discloses a CMP slurry for polishing substrates containing a low-k dielectric layer, the said CMP slurry containing                abrasive particles selected from the group consisting of alumina, silica, titania, ceria, zirconia, germania, magnesia, and co-formed products thereof; and        amphiphilic nonionic surfactants having at least one hydrophobic head group and at least one hydrophilic tail group.        
According to the US 2003/0228762 A1, suitable head groups include polysiloxanes, tetra-C1-4-alkyldecynes, saturated or partially unsaturated C6-30 alkyl groups, polyoxypropylene groups, C6-12 alkyl phenyl or alkyl cyclohexyl groups, and polyethylene groups. Suitable tail groups include polyoxyethylene groups. Thus, the amphiphilic anionic surfactant can be selected from the group consisting of polyoxyethylene alkyl ethers or esters. However, according to the examples of the US 2003/0228762 A1, the drop in the low-k dielectric MRR caused by the disclosed amphiphilic nonionic surfactants does not exceed 75%, and the tantalum nitride over low-k dielectric selectivity and the PETEOS over low-k dielectric selectivity do not exceed 3.
The European patent application EP 1 150 341 A1 discloses a CMP slurry for polishing metal layers containing nonionic polyoxyethylene-polyoxypropylene alkyl ether surfactants. However, neither the number of carbon atoms in the alkyl group nor the distribution of the oxyethylene and oxypropylene monomer units are specified accurately. Moreover, the European patent application remains silent about the CMP of low-k and ultra-low-k materials with CMP slurries containing such surfactants.
The American patent application US 2008/0124913 A1 discloses CMP slurry containing nonionic polyoxyethylene-polyoxypropylene alkyl ether surfactants of the general formula:CH3—(CH2)n—(CH(CH3)CH2O)y—(CH2CH2O)x—wherein the indices have the following meaning: n=3-22, y=1-30, and x=1-30 with x+y preferably at least 5, as polysilicon suppressors.
The American patent U.S. Pat. No. 6,645,051 B2 discloses a CMP slurry for polishing a memory hard disk substrate, the said CMP slurry comprising a polyoxyethylene-polyoxypropylene alkyl ether surfactant. However, neither the number of carbon atoms in the alkyl group nor the distribution of the oxyethylene and oxypropylene monomer units are specified accurately. Moreover, the American patent remains silent about the CMP of low-k and ultra-low-k materials with CMP slurries containing such surfactants.